LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 178

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

5-62
Register: 0x46 (0xC6)
Memory Access Control (MACNTL)
Read/Write
TYP[3:0]
DWR
DRD
PSCPT
SCPTS
SCSI Operating Registers
7
1
1
Wide Residue message is received. It may also be an
overrun data byte. The power-up value of this register is
indeterminate.
Chip Type
These bits identify the chip type for software purposes.
This technical manual applies to devices that have these
bits set to 0x07.
Bits 3 through 0 of this register are used to determine if
an external bus master access is to local or far memory.
When bits 3 through 0 are set, the corresponding access
is considered local and the MAC/_TESTOUT pin is driven
high. When these bits are clear, the corresponding
access is to far memory and the MAC/_TESTOUT pin is
driven low. This function is enabled after a Transfer
Control SCRIPTS instruction is executed.
DataWR
This bit is used to define if a data write is considered to
be a local memory access.
DataRD
This bit is used to define if a data read is considered to
be a local memory access.
Pointer SCRIPTS
This bit is used to define if a pointer to a SCRIPTS
indirect or table indirect fetch is considered to be a local
memory access.
SCRIPTS
This bit is used to define if a SCRIPTS fetch is
considered to be a local memory access.
TYP
1
4
1
DWR
3
0
DRD
2
0
PSCPT
1
0
SCPTS
0
0
[7:4]
3
2
1
0