cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 77

no-image

cx28500

Manufacturer Part Number
cx28500
Description
Cx28500 Multichannel Synchronous Communications Controller
Manufacturer
Mindspeed Technologies
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cx28500-12
Manufacturer:
FUJ
Quantity:
250
Serial Interface
returned to the Host, and a Buffer Status Descriptor is written with the COFA error encoding. The Buffer Status
Descriptor is written if the INHRBSD bit field in the RDMA Channel Configuration register is disabled (set to 1).
CX28500 then proceeds to the next message descriptor (MD) from the Receive Message Descriptor Table
(RMDT). In the transmit direction, however, CX28500 cannot recover from COFA without the Host’s intervention.
For example, a new channel activation is required.
Assertion of COFA condition generates a COFA interrupt encoded in the Interrupt Status Descriptor (ISD) toward
the Host if this interrupt is unmasked (see
Table 6-28, RSIU Port Configuration Register
and
Table 6-36, TSIU
Port Configuration
Register, respectively RCOFA_EN or/and TCOFA_EN bit fields).
If a synchronization signal (SYNC) is received (low to high transition on TSYNC or RSYNC) while the internal
COFA is asserted, an Interrupt Descriptor with the COFA interrupt encoding is generated immediately if this
interrupt is not masked.
When the internal COFA is deasserted, CX28500 generates an Interrupt Descriptor with CREC event encoding if
the interrupt is unmasked.
The receive serial bit stream processing resumes when the COFA condition is declared off. If channels are
configured in HDLC mode, then channels resume immediately if the COFA condition is declared off. While in
Transparent mode, channels start operating in the first time slot assigned to the logical channel. Thus, after a
RxCOFA, no channel recovery action is required because the channel recovers automatically.
For each transmitter path, the active channel (regardless of message processing) is immediately deactivated. As a
recovery channel action, the Host needs to reactivate the channel upon termination of the COFA condition. COFA
detection is not applicable in unchannelized mode. When COFA condition occurs, the transmit output is three-
stated. If operating in T1 mode, the F-bit cannot be three-stated after a COFA condition.
5.1.3
Out Of Frame (OOF)/Frame Recovery (FREC)
The Receiver Out-Of-Frame (ROOF) signal is asserted by the serial interface sourcing the channelized data to
CX28500. This signal indicates that the interface device has lost frame synchronization.
In the case of multiplexed E1 lines (2xE1, 4xE1), any given port ROOF signal can be asserted and deasserted as
the time slots are received from an Out-Of-Frame E1 followed by an in-frame E1.
ROOF assertion is detected by the Receiver Serial Interface (RSIU). If ROOF is asserted high and OOFIEN bit
field in the RSIU Port Configuration Descriptor is set, an OOF interrupt is generated toward the Host. For each
receive HDLC message that encountered an OOF condition, the corresponding Message Descriptor’s owner bit is
returned to the Host and a Buffer Status Descriptor is written with the OOF error encoding, along with EOM. The
EOM indicates that the current message is effectively ended as a result of a receiving error. The Buffer Status
Descriptor is written to Host memory only if configured to do so on a per-channel basis in the RDMA Channel
Configuration register. CX28500 then proceeds to the next Message Descriptor in the list of messages. As for the
RSIU, it starts to search for the opening flag of the next frame. For Transparent mode channels, the OOF causes
the data that is being transferred to the Host to be replaced by an all 1s sequence. No special actions are taken in
this case, and the Host must rely on the OOF interrupt to learn about the OOF.
While ROOF is asserted, if OOFABT bit field in the RSIU Port Configuration Descriptor is set, the receive process
is disabled. Thus CX28500 terminates any active messages for all active channels operating over the port;
otherwise, the receive process is enabled.
Notice that the OOF signal is examined on a per-time slot basis. Therefore, OOF assertion affects only those
logical channels that are mapped to time slots where OOF is asserted. The remaining time slots on the same serial
port are not affected by the OOF assertion on a specific time slot.
For ROOF to be deasserted, CX28500 must detect at least one frame without any OOF’s. As ROOF is deasserted,
CX28500 immediately restarts normal processing on all active channels. One to three time slots after deassertion
®
Mindspeed Technologies
28500-DSH-002-C
62
Mindspeed Proprietary and Confidential

Related parts for cx28500