cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 71

• Manufacturer Part Number: cx28500
• Description: Cx28500 Multichannel Synchronous Communications Controller
• Manufacturer: Mindspeed Technologies

4.1.9
The HOLD and HLDA (Intel) or BR* and BG* (Motorola) signal lines are used by CX28500 to arbitrate for the
EBUS.
For Intel-style interfaces, the arbitration protocol is as follows (refer to
Style).
1. CX28500 three-states EAD[31:0], EBE*[3:0]. WR*, RD*, and ALE*.
2. CX28500 requires EBUS access and asserts HOLD.
3. CX28500 checks for HLDA assertion by bus arbiter.
4. If HLDA is found to be deasserted, CX28500 waits for the HLDA signal to become asserted before continuing
5. If HLDA is found to be asserted, CX28500 continues with the EBUS access as it has control of the EBUS.
6. CX28500 drives the address lines (EAD[30:0]), EBE*[3:0], WR*, RD*, and ALE*. The data lines (EAD[31:0])
7. CX28500 completes EBUS access and deasserts HOLD.
8. Bus arbiter deasserts HLDA shortly thereafter.
9. CX28500 three-states EAD[31:0], EBE*[3:0]. WR*, RD*, and ALE*.
For Motorola-style interfaces, the arbitration protocol is as follows (refer to
Motorola-Style).
1. CX28500 three-states EAD[31:0], EBE*[3:0]. R/WR*, DS*, and AS*.
2. CX28500 requires EBUS access and asserts BR*.
3. CX28500 checks for BG* assertion by bus arbiter.
4. If BG* is found to be deasserted, CX28500 waits for the BG* signal to become asserted before continuing the
5. If BG* is found to be asserted, CX28500 continues with the EBUS access as it has control of the EBUS.
6. If BGACK* is not asserted CX28500 assumes control of the EBUS by asserting BGACK*.
7. CX28500 drives the address lines (EAD[30:0]), EBE*[3:0], R/WR*, DS*, AS*. The data lines (EAD[31:0]) are
8. Shortly after the EBUS cycle is started, CX28500 deasserts BR*.
9. Bus arbiter deasserts BG* shortly thereafter.
10. CX28500 completes EBUS cycle.
11. CX28500 deasserts BGACK*.
12. CX28500 three-states EAD[31:0], EBE*[3:0]. R/WR*, DS*, and AS*.
4.1.10
Utilizing the EBUS address lines, EAD[17:0], and the byte enable lines, EBE[3:0]*, the EBUS can be connected in
either a multiplexed or non-multiplexed address and data mode.
28500-DSH-002-C
the EBUS operation.
are driven one cycle later than the other aforementioned signals.
EBUS operation.
driven one cycle later than the other aforementioned signals.
Arbitration
Connection
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Figure 10-7, EBUS Write/Read Cycle, Intel-
Figure 10-8, EBUS Write/Read Cycle,
Expansion Bus (EBUS)
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