cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 63

• Manufacturer Part Number: cx28500
• Description: Cx28500 Multichannel Synchronous Communications Controller
• Manufacturer: Mindspeed Technologies

3.2.1.3
This location contains the Class Code and Revision ID registers. The Class Code register contains the Base Code,
Sub Class, and Register Level Programming Interface fields. These are used to specify the generic function of
CX28500. The Revision ID register denotes the version of the device.
Table 3-4.
3.2.1.4
Table 3-5.
28500-DSH-002-C
GENERAL NOTE:
1. An active low signal is detected by a trailing asterisk (*).
Field
31:24
23:16
Field
31:24
23:16
15:11
15:8
10:8
Bit
7:0
Bit
7:0
Programming Interface
Sub Class Code
Register Level
Latency Timer
Register 2, Address 08h
Register 3, Address 0Ch
Header Type
Class Code
Revision Id
Reserved
Reserved
Name
Name
Register 2, Address 08h
Register 3, Address 0Ch
Reset
Reset
Value
Value
02h
80h
01h
0h
0
0
0
0
0
Mindspeed Proprietary and Confidential
Mindspeed Technologies
Type
Type
RW
RO
RO
RO
RO
RO
RO
RO
RO
Function: Network Controller.
Type: Other.
Indicates there is nothing special about programming CX28500.
The revision ID numbers are: 00 for Rev A (-11P and -11R parts) and 01 for RevB (-12
parts).
Unused.
CX28500 is a single function device with the standard layout of configuration register
space.
The latency timer is an 8-bit value that specifies the maximum number of PCI clocks that
CX28500 can keep the bus after starting the access cycle by asserting its FRAME*. The
latency timer ensures that CX28500 has a minimum time slot for it to own the bus, but
places an upper limit on how long it owns the bus.
Unused.
®
Description
Description
Host Interface
48