cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 115
cx28500
Manufacturer Part Number
cx28500
Description
Cx28500 Multichannel Synchronous Communications Controller
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28500.pdf
(224 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
cx28500-12
Manufacturer:
FUJ
Quantity:
250
- Current page: 115 of 224
- Download datasheet (2Mb)
a Receive Buffer Status Descriptor, corresponding to the partially received message, indicates a Long Message
error condition, and an interrupt descriptor is generated toward the Host indicating the same error condition.
Table 6-29.
6.7
Transmit path registers contain the information necessary to configure the transmit direction. This configuration
includes registers that are related to the DMA block, Host interface, registers that control the TSLP line processor,
and TSIU.
6.7.1
The TSLP Channel Status register, defined in
It provides information from the TSLP block regarding the channel state and status. There is one TSLP Channel
status register for each of CX28500’s channels (i.e., 1024 registers).
Table 6-30.
28500-DSH-002-C
31:14
13:0
31:4
3:1
0
GENERAL NOTE:
Bit
Bit
Field Name
MAXFRM[13:0]
TACTIVE
Field Name
RSVD
RSVD
The Host may change the value of Maximum Message Length register only if the channel that uses its value (according to
MAXSEL-bit in the configuration memory) is inactive.
Maximum Message Length Register
TSLP Channel Status Register
RSVD
Transmit Path Registers
TSLP Channel Status Register
Host
R
R
R
Value
—
0
Don’t care
Value
Reserved.
Defines a limit for the maximum number of bytes allowed in a received HDLC message. Valid values
for the register range from 0 to 16 K-1.
The formula to set MAXFRM is
MAXFRM = Max Allowed Message Length (bytes) + FCS (bytes)–1.
where
FCS = 0 for Non-FCS Mode
FCS= 2 byte for HDLC-16 Mode
FCS = 4 byte for HDLC-32 Mode
A Too Long Message interrupt is generated when the number of bytes in the processed message
exceeds Max Allowed Message Length.
Mindspeed Proprietary and Confidential
0
0
1
Mindspeed Technologies
Reserved.
Reserved.
Channel Inactive.
The channel has been deactivated due to either a PCI Reset or Soft Chip Reset, or a Service
Request Channel Deactivation or one of the following transmit errors: TxBUFF, TxCOFA.
Channel Active.
Table
6-30, is a Read Only (RO) register.
®
Description
Description
Memory Organization
100
Related parts for cx28500
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Framer SDH ATM/POS/STM-1 SONET/STS-3 3.3V 272-Pin BGA
Manufacturer:
Mindspeed Technologies
Part Number:
Description:
RS8234EBGC ATM XBR SAR
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
ATM IMA 8.192Mbps 1.8V/3.3V 484-Pin BGA
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
ATM SAR 622Mbps 3.3V ABR/CBR/GFR/UBR/VBR 456-Pin BGA
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
RS8234EBGD ATM XBR SAR, ROHS
Manufacturer:
Mindspeed Technologies
Part Number:
Description:
3-PORT T3/E3/STS-1 LIU WITH/ DJAT IC (ROHS)
Manufacturer:
Mindspeed Technologies
Part Number:
Description:
ATM IMA 800Mbps 1.8V/3.3V 256-Pin BGA
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
Framer SDH ATM/POS/STM-1 SONET/STS-3 3.3V 272-Pin BGA
Manufacturer:
Mindspeed Technologies
Part Number:
Description:
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Mindspeed Technologies
Datasheet:
Part Number:
Description:
Manufacturer:
Mindspeed Technologies
Datasheet: