ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 531

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
Preliminary
22.4: Clock Monitor Status and Mask Registers (ClkStat1 (ClkMask1))
The clock monitor status register bits indicate the loss of a specific island’s clock. They are set whenever a
difference between the clock test signal and the individual island’s clock acknowledge signal occurs after the
clock monitor test period.
For each bit position:
For each bit position:
Length
Type
Address
Power On Value
pnr25.chapt06.01
August 14, 2000
7
Bit(s)
0 = Normal operation of the corresponding clock island
1 = The corresponding island clock is lost. An active bit of this register is reset by restoring the clock of
the corresponding clock island and by writing a one into the corresponding bit position. Reading one reg-
ister will reset all bits of this register if the "clear-register" option is set in bit ConfGP1(3). The clock moni-
tor mask register ClkMask1 controls the propagation of active clock monitor status signals. ClkMask1
controls propagation to the signal FElocCS (bit 1 of IRQGP1 register). The mask registers allow read and
write access.
0 = The corresponding clock status bit is masked (DEFAULT).
1 = The corresponding clock status bit is active (for ClkMask1, the corresponding bit activates the signal
FElocCS (bit 1 of IRQGP1 register).
3-0
6
7
6
5
4
5
Island ACH_Tx lost clock
Island ACH_Rx lost clock
Island OFP_Tx lost clock
Island OFP_Rx lost clock
Reserved
4
3
Reserved
2
1
0
8 bits
Read/Write
C30
X’00’
Description
IBM Processor for Network Resources
GPPINT Register Description
Page 531 of 676
IBM3206K0424

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