ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 458

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
17.2: Machine State Register (MSR)
Controls the run time state of the Cobra Core.
Length
Type
Address
Power on Reset value
Restrictions
Processor Core (PCORE)
Page 458 of 676
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit(s)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Reserved
603 RI
Reserved
Reserved
603 DR
603 IR
IP
Reserved
Reserved
603 BE / 401 DE
603 SE
Reserved
603/401 ME
603/401 FP
603/401 PR
603/401 EE
Reserved
Name
32 bits
Read/Write
Accessible via the mtmsr/mfmsr instructions
X’00 00 00 40’
None
Unimplemented (603/401 LE). Cobra Core doesn’t support Little Endian execution.
Recoverable Interrupt. This bit is cleared when an exception is taken.
Reserved
Reserved
Translation is not supported. Do not set this bit.
Translation is not supported. Do not set this bit.
In combination with HID0(IPO = 26), this bit determines the upper 16 bits of an excep-
tion vector. See Hardware Implementation Detail 0 Register (HID0) on page 456 for full
details.
Reserved
Unimplemented (603 FE1). Cobra Core doesn’t support floating point.
If HID0(25) = 0 this is 603 BE otherwise it is 401 DE.
If HID0(25) = 0 this is 603 SE otherwise it is a read/write bit with no affect.
Unimplemented (603 FE0). Cobra Core doesn’t support floating point.
Enables Machine Check Exceptions. If this bit is ’1’, a machine check will cause a
machine check exception to occur. If this bit is ’0’, a machine check will cause Cobra
Core to halt execution (if HID0(0) = 1), or the machine check will be ignored (if HID0(0)
= 0).
If FP=0, all floating point instructions cause a floating point disabled interrupts. If FP=1,
all floating point instructions cause illegal instruction interrupts.
Privilege Instruction Restricted. If this bit is ’1’, attempting to execute a privileged
(supervisor) instruction will result in a privilege violation exception. If this bit is ’0’, all
instructions may be executed normally.
External Interrupt Enable. Used to mask off non-critical level exceptions.
Unimplemented (603 ILE) Cobra Core doesn't support Little Endian execution.
Description
9
8
Reserved
7
6
5
4
pnr25.chapt05.01
August 14, 2000
3
Preliminary
2
1
0