ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 206

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
6.9: VIMEM Access Control Register
The bits in this register control the configurable features of the Virtual Memory logic. See Note on Set/Clear
Type Registers on page 93 for more details on addressing.
Length
Type
Address
Power On Value
Restrictions
ATM Virtual Memory Logic (VIMEM)
Page 206 of 676
15 14 13 12 11 10
Bit(s)
11-0
15
14
13
12
When set, this bit forces the Virtual Memory logic to ignore the virtual buffer map validity indication, and force all maps to
appear valid.
When set, this bit forces the Virtual Memory logic to fetch the required map entry from storage on every new virtual access.
If a Virtual Memory map is updated by the software for any reason, this bit should be toggled on and off after the map is
updated and before any virtual access happens to ensure that the Virtual Memory logic is not using stale cached map seg-
ments. There is no hardware provided to make sure that the map entry required by the Virtual Memory logic is not con-
tained in one of the BCACH lines. If is the responsibility of the software to ensure that all modified lines are flushed from
the cache before the Virtual Memory logic needs them.
When set, this bit forces all accesses to Packet Memory to be serialized.
When set, this bit causes control accesses to always have priority over packet accesses in a single memory bank configu-
ration. When reset, priority will toggle every time an access is initiated.
Reserved
9
8
16 bits
Read/Write
XXXX 0D80 and 84
X’0’
None
7
Reserved
6
5
4
3
2
1
0
Description
pnr25.chapt04.01
August 14, 2000
Preliminary