ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 478

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
17.16: PCORE Cobra Core Access Priority Control Register
The PCORE Cobra Core Access Priority Control Register provides Cobra Core defined status information
about PCORE. It is used to control the order and priority of access to the various memory subsystems that
the Cobra Core has access to. It is to be set up at initialization time an not dynamically changed.
Length
Type
DCR Address
Power on Reset value
Restrictions
Processor Core (PCORE)
Page 478 of 676
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
27-26
23-22
21-20
19-18
17-16
15-14
Bit(s)
25
24
Reserved
ICache Register Access Priority
DCache Register Access Priority
FDMA - Packet Memory Access Priority
DCache - Packet Memory Access Priority
ICache - Packet Memory Access Priority
Write Around FIFO - Packet Memory Access
Priority
FDMA - Control Memory Access Priority
28 bits
Read/Write
XXXX 401C
X’01 E4 E4 E4’
For each controller accessed, the values cannot be duplicated. That is, all the prior-
ities to a given target subsystem must be unique.
Name
Reserved
This sets the priority into the IBM3206K0424 register port. Zero is low prior-
ity; one is high priority.
This sets the priority into the IBM3206K0424 register port. Zero is low prior-
ity; one is high priority.
This sets the priority of access to Packet Memory. Zero is the lowest priority;
three is the highest priority.
This sets the priority of access to Packet Memory. Zero is the lowest priority;
three is the highest priority.
This sets the priority of access to Packet Memory. Zero is the lowest priority;
three is the highest priority.
This sets the priority of access to Packet Memory. Zero is the lowest priority;
three is the highest priority.
This sets the priority of access to Packet Memory. Zero is the lowest priority;
three is the highest priority.
9
8
7
6
Description
5
4
3
2
1
0
pnr25.chapt05.01
August 14, 2000
Preliminary