ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 336

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
RXXLT Block Diagram
RXXLT Functional Description
RXXLT is the first stage in the cell processing pipeline. RXXLT provides general LCD translation facilities and
link level statistics. These are provided via a nano-processor and nano-programs.
Up to four unique drops/ports can be supported, each with a unique configuration. Each port is able to run a
unique nano-program to do LCD address translation. For example, one port may be a packet-based PHY
using 64-byte segments with PPP LCD translation, and another port may be an ATM cell based PHY. The
drop/config number (0-3) along with the port id is passed to RXXLT from RXBUF/LINKR. The drop number
(0-3) is used to specify which nano-program is executed by RXXLT to translate cell/packet information into an
LCD address. This is different from previous versions of the processor which had a fixed LCD translation
mechanism. RXXLT instruction formats are not defined here and are IBM Confidential.
RXXLT uses the resulting LCD address to load the LCD cache for the next stage of the pipeline. The LCD
address and cell buffer address are passed to RXCRC upon completion of processing.
There are a number of degrees of freedom in the LCD translation. Generally, the nano program performs the
following steps:
There are eight general purpose registers per PHY drop and four drops. These eight registers contain values
that the nano-code uses, and are available on a per port basis. For example, the LCD translate table
addresses would reside in these registers (this is different from previous versions of the processor where
these registers were at fixed addresses). Other items that might reside in these registers are default/error
LCD addresses, compare values, and masks. Because these are general purpose registers, multiple LCD
tables or multiple default LCDs can be specified. One quarter of the total registers are available to each port,
so there can be an LCD translate table (etc.) for each port.
The total LCD translate tables and LCD table sizes are only limited in size by the amount of memory that is
available to the IBM3206K0424. The LCD indexes are limited to 16 bits, and LCD addresses are always
128-byte aligned.
The LCD translation code must execute in one cell time in order to run at full bandwidth. The only variable
portion of the code execution time is the reads to IBM3206K0424 memory when reading the LCD translation
Cell/Packet Re-assembly (REASM)
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• Gather some bytes from the cell buffer
• Do some error checking and default LCD checking
• Select and shift appropriate bits to form an LCD translate table index
• Read the LCD translate table to get an LCD index
• Generate the LCD address from the LCD index and the LCD base address
RXXLT
POOLS Get Interface
XLATE Nano Processor
RXBUF Interface
LCD Translation Cache
CM Read Interface
RXLCD Interface
RXCRC
Interface
pnr25.chapt05.01
August 14, 2000
Preliminary

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