ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 402

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
13.22: RXQUE Enq FIFO Head Ptr Register
Used to maintain the enqueue FIFO. Points to the head FIFO entry in the FIFO array. The MSB bit is used to
determine if the head is chasing the tail, and is inverted each time the head pointer wraps.
Length
Type
Address
Power On Value
Restrictions
13.23: RXQUE Enq FIFO Tail Ptr Register
Used to maintain the enqueue FIFO. Points to the next free FIFO entry in the FIFO array. The MSB bit is used
to determine if the head is chasing the tail, and is inverted each time the tail pointer wraps.
Length
Type
Address
Power On Value
Restrictions
13.24: RXQUE Enq FIFO Array
Holds events waiting to be placed on an rxq. Array is organized as a 16x36 array. To access the upper four
bits of each word (holds the receive queue number for event), the array word number should be used as the
address. To access the low order 32 bits (the event portion), the array word number times two plus four
should be used. For example, address zero accesses the receive queue portion of array word zero, and
address four accesses the event portion of the array word zero.
Note: The most significant bit is not used. Only the three bits are needed for the receive queue number.
Length
Type
Address
Power On Value
Restrictions
Receive Queues (RXQUE)
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5 bits
Read/Write
XXXX 1E88
X’00000000’
Can only be written in diagnostic mode.
5 bits
Read/Write
XXXX 1E8C
X’00000000’
Can only be written in diagnostic mode.
16 words X 36 bits
Read/Write
XXXX 1F00-FF8
X’00000000’
Can only be read/written in diagnostic mode. When read in non-diagnostic mode,
zero is returned.
pnr25.chapt05.01
August 14, 2000
Preliminary