ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 326

no-image

ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
Preliminary
single DMA descriptor is formed by DMAQS directly in DMA queue storage using the page address and the
same information that would have been filled into the DMA descriptor. Generally, using page addresses
performs better, but is less versatile, which is usually a good trade off. Normally no DMA event is generated in
the flags when pages are DMAed.
When the last cell of a packet is received, and all the data pages have been DMAed, the packet header and
DMA list are updated and DMAed into a header buffer. The mechanism and configuration of the header buffer
is similar to the pages, but separate configuration is usually necessary for correct functionality. For example,
different flags are normally used in order to get an event for the header DMA so the user can process the
packet. The header DMA normally frees the IBM3206K0424 buffer; another difference is the page (or buffer)
size used for headers is normally different than the normal page size. Some of the optional features
described later also drive having different configuration for the header DMAs.
Once the user gets the event for the header DMA, the user processes the received packet using the DMA list
and the packet header. Once the packet has been processed, the pages or descriptors need to be returned to
the proper receive queue when the pages can be reused, thus completing the scatter processing.
There are several ways of getting that important event to start the receive processing. Usually the event is
generated when the last header DMA is complete. If DMA descriptors are being used, then there are two
choices. First, the normal DMA flag that generates an event can be used. This generates an event with the
DMA descriptor address in the significant bits. While this works and may be desirable in some environments,
the DMA descriptor needs to be read in order to get access to the host header buffer address. The second
way to generate an event when using descriptors is to provide a second DMA descriptor in the DMA descrip-
tor chain that enqueues the header buffer address and a user-defined event in the lower order bits. Generat-
ing an event in this manner provides the user with the buffer address; the header DMA descriptor address is
available in the header buffer as part of the DMA list.
When using page addresses, the event source in the cut through configuration should be set to use the desti-
nation address as the event data. When this is done, the event data contains the header buffer address as in
the second case above.
Error Recovery
There are two types of error that need to be handled. First, if there is no error on the receive packet and a
page address was not available, then the packet is surfaced to the user with a "no DMA descriptor available"
event in the event type field and the IBM3206K0424 buffer address in the event information field. The user
has a choice at this point. The packet is good so it can be used or freed by the user. In either case, the DMA
list in the packet header must be recovered. So if the DMA list in the header is not used, it should be recov-
ered by returning it to the proper receive queues. The event surfaced specifies which type of page address
failed so the user can parse the DMA list properly. The event will specify whether a normal page descriptor,
optional header descriptor, or packet header descriptor. The same descriptor recovery must be performed
when an error event is surfaced (that is, CRC error). When there is an error event, no packet header DMA is
performed so no packet header descriptor is in the DMA list.
Scatter Options
Most of the optional scatter features have to do with the header bytes and how the header DMA is performed.
How the number of header bytes is determined is explained below. For now, just assume there are some
number header bytes. The numHeadbytes field in the DMA header specifies the number of header bytes that
are available. The location of the header bytes in the DMA buffers can be configured. The default is for them
to be kept with the packet header and DMA list in the packet header buffer. For this case, the user should be
sure the packet header buffer size is large enough to contain all of this data.
Alternatively, the header bytes can be placed in a separate buffer. To do this, split header mode should be
Cell/Packet Re-assembly (REASM)
pnr25.chapt05.01
Page 326 of 676
August 14, 2000

Related parts for ibm3206k0424