ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 318

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ibm3206k0424

Manufacturer Part Number
ibm3206k0424
Description
Ibm Processor For Network Resources
Manufacturer
ETC-unknow
Datasheet
IBM3206K0424
IBM Processor for Network Resources
11.14: SEGBF Cell Staging Array Data
This array is divided into 16 64-byte buffers used to assemble cells that are ready for transmission on the
physical interface.
Length
Type
Address
Power On Value
Restrictions
11.15: SEGBF Instruction SRAM Pointer
This register points to an offset in the SEGBF SRAM that is used to store processor instructions. This register
must be loaded with the correct offset before the desired data can be read/written from/to the SEGBF instruc-
tion SRAM data register. This register will auto-increment after each access to the associated data register.
When the last address is accessed, this register wraps to zero. The first 256 locations in the array should be
loaded with the instructions for processor 1, and the second 256 locations should be loaded with the instruc-
tions for processor 2.
Length
Type
Address
Power On Value
Restrictions
ATM Transmit Buffer Segmentation (SEGBF)
Page 318 of 676
9
Bit(s)
9-1
8
0
7
6
These bits provide an offset into the SEGBF instruction SRAM for accesses from the PCI bus. These bits provide access
to the 512 unique two-byte locations in the array. Accessing the last location in the array will cause the address to wrap
back around to the beginning of the array.
This bit is not implemented; it can not be written and will always return ‘0’ when read.
Offset
5
4
3
2
32
Read/Write
XXXX 14C4
Undefined
This array can only be accessed when the diagnostic mode bit in the control regis-
ter is set. Accesses attempted when not in diagnostic mode will return
0xBADDBADD.
10
Read/Write
XXXX 14C8
X’000’
None
1
‘0’
0
Description
pnr25.chapt05.01
August 14, 2000
Preliminary

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