ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 230

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
7.15: ARBIT Packet Winner Register
The bits in this register indicate which entity currently owns Packet Memory.
Length
Type
Address
Power On Value
Restrictions
ATM Packet/Control Memory Arbitration Logic (ARBIT)
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit(s)
29-8
7-4
3-0
31
30
Reserved.
For performance reasons, two sets of operational latches (bank A and bank B) exist in the arbiter for Packet Memory. When
set, this bit indicates that the B latches are active, and when reset it indicates that the A latches are active. When this bit is
set and memory is locked, bits 7-4 of this register contain a value that indicates the entity that most recently was accessing
memory. If this bit is reset and memory is locked, bits 3-0 of this register contain a value that indicates the entity that was
accessing memory most recently.
Reserved. Will read ’0’.
Packet winner B.
Packet winner A.
Value encoding is:
F: Reserved
E: CHKSM
D: PCORE LO
C: BCACH LO
B: POOLS LO
A: CSKED
9: Reserved
8: RXQUE
32 bits
Read
XXXX 0EAC
X’F’
None
7:
6:
5:
4:
3:
2:
1:
0:
SEGBF
Reserved
RXAAL
DMAQS
PCORE HI
POOLS HI
GPDMA
BCACH HI
Reserved
Description
9
8
7
6
5
4
pnr25.chapt04.01
August 14, 2000
3
Preliminary
2
1
0