ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 181

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

Preliminary
4.7: GPDMA DMA Max Burst Time
Used to limit the number of cycles a master can burst on the PCI bus. When a DMA burst is started, a counter
is loaded with the value in this register. When the counter expires and the current access completes, the PCI
bus is released for use by another bus master. Writing a non-zero value to this register enables this function.
Length
Type
Address
Power on Value
Restrictions
4.8: GPDMA Maximum Memory Transfer Count
Used to limit the size of data requests to the Control/Packet Memories. This register defines the maximum
number of bytes to be transferred in a single storage request to IBM3206K0424 Storage.
Length
Type
Address
Power on Value
Restrictions
4.9: GPDMA Checksum Register
This register contains the accumulated checksum value. It can also be used to initialize the checksum with a
seed value. The most significant bit contains the alignment state (1 = odd, 0 = even alignment). This register
can be read at four different addresses. The base address returns the unmodified accumulated checksum.
The base address +4 returns the inverted accumulated checksum. The base address + 8 returns the
byte-swapped accumulated checksum. The base address + 12 returns the inverted byte-swapped accumu-
lated checksum.
Length
Type
Address
Power on Value
Restrictions
pnr25.chapt04.01
August 14, 2000
24 bits
Read/Write
XXXX 0158
X’000’
None
7 bits
Read/Write
XXXX 0150
X’40’
None
17 bits
Read/Write
XXXX 0160
X’00000’
None
IBM Processor for Network Resources
General Purpose DMA (GPDMA)
Page 181 of 676
IBM3206K0424