at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 932

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

44.3.2
932
Procedure to Switch from Command Queue Drawing to Direct Drawing
AT91SAM9263 Preliminary
Video RAM
The Video RAM type and the address generated to access it are mainly based on data bus type
(8, 16 or 32 bits), on number of bits per pixel and the virtual memory size required by the system.
The 2DGC supports SRAM, PSRAM and SDRAM memory chips of 8-bit, 16-bit or 32-bit data
buses. Memory chips can either be external memory (connected to EBI) or internal memory. The
most significant 12 bits of the 32-bit video memory address can be programmed with the
required offset.
The 2DGC sees the video memory as a maximum virtual page of 2048(column-x) x 2048(rows-
y) pixels with a pixel resolution up to 24 bpp. Hence, the maximum video memory that 2DGC can
see is 12MBytes = 2048 * 2048 * 24/8.
The row size of the virtual memory can be programmed to be 256, 512, 1024 or 2048 pixels.
Since the minimum row size selection is 256 pixels and the next size up is 512 pixels, some
chips that are tailored for 240(column size) x 320(row size) at 8 bpp LCDs have only 80 Kbytes
of internal RAM and thus do not fit in the resolution scheme defined above. In order to make the
2DGC compliant with this kind of use, a special option was added to make 320 pixel wide row at
8 bpp selection possible. However, this slows down the drawing process. For instance, when a
line draw command is issued, the 2DGC calculates the row offset based on the start/end pixel
coordinates of the line draw versus a predefined shift in bits for row size selections of 256, 512,
1024 and 2048 (they are all powers of 2 and hence the shift is pre-defined in logic).
There are two suggestions to solve this problem:
However, a pixel resolution of 320(column) x 240(row) at 8 bpp can use the internal memory of
80 Kbytes if necessary, as a row size selection of 256 pixels can be used. There is however no
problem with any ¼ VGA at anything less than 8 bpp.
• Wait for Command queue buffer empty status (BUFE) in 2DGC_GIR with a five second
• Post an event to the graphics task when interrupt is triggered or exit the loop checking for the
• Wait for command queue buffer empty status in 2DGC_GIR.
• Wait for line drawing engine bit (LTB bitfield in 2DGC_GSR) to clear if a line is being drawn.
• Wait for block transfer engine bit (BTB bitfield in 2DGC_GSR) to clear if a block is being
• Wait for polygon fill done bit (FD bitfield in 2DGC_FCR) to set if a polygon fill is being
• If a significant amount of drawing using the 2DGC is required and 240 x 320 at 8 bpp is not
• If there is a firm requirement for 240 x 320 at 8 bpp, then the special option can be enabled in
timeout or wait for an interrupt event if interrupt is enabled (recommended).
status when command queue buffer is empty (BUFE in 2DGC_GIR). Load the next set of
commands (refer to code examples).
transferred.
performed.
mandatory, a bigger frame can be used thus taking advantage of the 2DGC drawing speed.
the 2DGC that makes 240 x 340 at 8 bpp support possible but slow, or the 2DGC can be
disabled and software that can be faster is used instead.
6249D–ATARM–20-Dec-07