at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 1008

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Table 46-21. SMC Read Signals - NCS Controlled (READ_MODE = 0) (Continued)
46.7.3.2
Table 46-22. SM Write Signals - NWE controlled (WRITE_MODE = 1)
Notes:
1008
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
12
13
14
15
16
17
18
19
20
21
1. Hold length = total cycle duration - setup duration - pulse duration. “hold length” is used for “ncs wr hold length” or “NWE
AT91SAM9263 Preliminary
hold length”.
A2 - A25 valid before NCS High
NRD low before NCS High
NCS Pulse Width
Write Timings
Parameter
Data Out Valid before NWE High
NWE Pulse Width
NBS0/A0 NBS1, NBS2/A1, NBS3,
A2 - A25 valid before NWE low
NCS low before NWE high
NWE High to Data OUT, NBS0/A0
NBS1, NBS2/A1, NBS3, A2 - A25
change
NWE High to NCS Inactive
NWE High to Data OUT, NBS0/A0
NBS1, NBS2/A1, NBS3, A2 - A25,
NCS change
NBS0/A0, NBS1, NBS2/A1, NBS3,
(1)
VDDCORE supply
VDDIOM supply
HOLD or NO HOLD SETTINGS (ncs rd hold ≠ 0, ncs rd hold = 0)
HOLD or NO HOLD SETTINGS (nwe hold ≠ 0, nwe hold = 0)
(1)
NO HOLD SETTINGS (nwe hold = 0)
HOLD SETTINGS (nwe hold ≠ 0)
(ncs rd setup +
(ncs rd setup +
length * t
(nwe hold - ncs
ncs rd pulse)*
ncs rd pulse -
ncs rd setup +
ncs rd pulse
t
t
(nwe setup -
nwe pulse) *
nrd setup)*
nwe pulse *
nwe pulse *
nwe setup *
t
t
t
t
t
t
CPMCK
CPMCK
nwe hold *
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
wr hold )*
1.08V
- 0.2
2.9
- 3.0
- 0.1
CPMCK
- 2.7
- 0.3
- 1.2
- 2.0
- 2.2
- 1.0
1.8V
length * t
+ ncs rd pulse
pulse)* t
(ncs rd setup
(ncs rd setup
(nwe hold - ncs
- nrd setup)*
ncs rd pulse
ncs rd setup +
t
CPMCK
(nwe setup -
nwe pulse) *
nwe setup *
nwe pulse *
nwe pulse *
t
t
t
t
t
t
+ ncs rd
nwe hold *
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
wr hold )*
- 2.2
- 0.2
1.2V
2.9
- 0.1
CPMCK
CPMCK
- 1.8
- 0.3
- 0.9
- 1.4
- 2.0
- 0.7
Min
length * t
pulse)* t
+ ncs rd pulse
(ncs rd setup
(ncs rd setup
- nrd setup)*
ncs rd pulse
t
ncs rd setup +
ncs wr hold )*
CPMCK
(nwe setup -
nwe pulse) *
nwe setup *
nwe pulse *
nwe pulse *
t
t
t
t
t
t
(nwe hold -
+ ncs rd
nwe hold *
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
- 3.4
- 0.5
1.08V
2.7
CPMCK
- 0.2
CPMCK
- 2.9
- 0.7
- 1.6
- 2.4
- 2.4
- 1.0
3.3V
length * t
(ncs rd setup +
(ncs rd setup +
ncs rd pulse)*
ncs rd pulse -
ncs rd setup +
ncs rd pulse
ncs wr hold )*
t
t
nrd setup)*
(nwe setup -
nwe pulse) *
nwe pulse *
nwe pulse *
nwe setup *
CPMCK
CPMCK
t
t
t
t
t
t
(nwe hold -
nwe hold *
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
1.2V
0.4
2.7
6249D–ATARM–20-Dec-07
CPMCK
- 2.6
- 0.2
- 2.0
- 0.6
- 1.2
- 1.7
- 2.1
- 0.7
-
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns