at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 722

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at91sam9263

Manufacturer Part Number
at91sam9263
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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38.5.3.4
Interrupts
Depending on the interrupt mask in the PWM_IMR register, an interrupt is generated at the end
of the corresponding channel period. The interrupt remains active until a read operation in the
PWM_ISR register occurs.
A channel interrupt is enabled by setting the corresponding bit in the PWM_IER register. A chan-
nel interrupt is disabled by setting the corresponding bit in the PWM_IDR register.
AT91SAM9263 Preliminary
722
6249D–ATARM–20-Dec-07

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