at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 301

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

24.4
Table 24-3.
6249D–ATARM–20-Dec-07
0x20 - 0x3C
0xac..0x2bc
0x78 - 0x94
Offset
0x2c0
0x2c4
0x2c8
0x2d0
0x2cc
0x1C
0x4C
0x5C
0x7C
0x9C
0x10
0x14
0x18
0x40
0x44
0x48
0x50
0x54
0x58
0x60
0x64
0x68
0x70
0x74
0x98
0xa0
0xa4
0xa8
0xC
0x0
0x4
0x8
DMA Controller (DMAC) User Interface
DMA Controller (DMAC) User Interface
Register
Channel 0 Source Address Register
Reserved
Channel 0 Destination Address Register
Reserved
Channel 0 Linked List Pointer Register
Reserved
Channel 0 Control Register Low
Channel 0 Control Register High
Reserved
Channel 0 Configuration Register low
Channel 0 Configuration Register High
Channel 0 Source Gather Register
Reserved
Channel 0 Destination Scatter Register
Reserved
Channel 1 Source Address Register
Reserved
Channel 1 Destination Address Register
Reserved
Channel 1 Linked List Pointer Register
Reserved
Channel 1 Control Register Low
Channel 1 Control Register High
Reserved
Channel 1 Configuration Register Low
Channel 1 Configuration Register High
Channel 1 Source Gather Register
Reserved
Channel 1 Destination Scatter Register
Reserved
Raw Status for IntTfr Interrupt
Reserved
Raw Status for IntBlock Interrupt
Reserved
Raw Status for IntSrcTran Interrupt
Register Name
DMAC_RawBlock
DMAC_SAR0
DMAC_DAR0
DMAC_LLP0
DMAC_CTL0L
DMAC_CTL0H
DMAC_CFG0L
DMAC_CFG0H
DMAC_SGR0
DMAC_DSR0
DMAC_SAR1
DMAC_DAR1
DMAC_LLP1
DMAC_CTL1L
DMAC_CTL1H
DMAC_CFG1L
DMAC_CFG1H
DMAC_SGR1
DMAC_DSR1
DMAC_RawTfr
DMAC_
AT91SAM9263 Preliminary
RawSrcTran
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Read
Read
Read
Reset Value
0x00000004
0x00000004
0x00000c00
0x00000c20
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
-
-
-
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