at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 639

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

36.6
Table 36-4.
Table 36-5.
Notes:
6249D–ATARM–20-Dec-07
Offset
0xC0
0xC4
Offset
0x00
0x40
0x80
0x0C
0x1C
0x2C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0xFC
Timer Counter (TC) User Interface
1. Read-only if WAVE = 0
Channel/Register
TC Channel 0
TC Channel 1
TC Channel 2
TC Block Control Register
TC Block Mode Register
TC Global Memory Map
TC Channel Memory Map
Register
Channel Control Register
Channel Mode Register
Reserved
Reserved
Counter Value
Register A
Register B
Register C
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
TC_BCR (Block Control Register) and TC_BMR (Block Mode Register) control the whole TC
block. TC channels are controlled by the registers listed in
channel registers in
tioned in
Table 36-5
.
Table 36-5
is in relation to the offset of the corresponding channel as men-
TC_CMR
TC_CCR
TC_IMR
TC_IER
TC_IDR
TC_CV
TC_RA
TC_RB
TC_RC
TC_SR
TC_BCR
TC_BMR
Name
Name
–
AT91SAM9263 Preliminary
See
See
See
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Write-only
Read-only
Read-only
Write-only
Write-only
Read-only
Write-only
Access
Access
Table 36-5
Table 36-5
Table 36-5
Table 36-5
–
(1)
(1)
. The offset of each of the
Reset Value
Reset Value
–
0
–
–
0
0
0
0
0
–
–
0
–
–
0
639