at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 293

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 24-12. DMA Transfer Flow for Source Address Auto-reloaded and Linked List Destination Address
24.3.5.6
6249D–ATARM–20-Dec-07
Multi-block Transfer with Source Address Auto-reloaded and Contiguous Destination Address (Row 3)
DMAC Transfer Complete
interrupt generated here
1. Read the Channel Enable register to choose a free (disabled) channel.
2. Clear any pending interrupts on the channel from the previous DMA transfer by writing
3. Program the following channel registers:
to the Interrupt Clear registers: DMAC_ClearTfr, DMAC_ClearBlock,
DMAC_ClearSrcTran, DMAC_ClearDstTran, DMAC_ClearErr. Reading the Interrupt
Raw Status and Interrupt Status registers confirms that all interrupts have been
cleared.
Block Complete interrupt
generated here
Channel Disabled by
hardware
yes
Source/destination status fetch
DMAC State Machine Table?
Stall until block interrupt
DMAC block transfer
Hardware reprograms
MASKBLOCK[X]=1 ?
Cleared by hardware
DARx, CTLx, LLPx
CTLx.INT_EN=1
Channel Enabled by
Row1 or Row5 of
Reload SARx
AT91SAM9263 Preliminary
LLI Fetch
Is DMAC in
software
&&
no
yes
no
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