at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 1051

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Table 50-1.
6249D–ATARM–20-Dec-07
Revision
6249C
Revision History (Continued)
Comments
In
All new information for
Slaves,” on page 16
In
In
Corrected
In
list of EBI1.
In
removed mention of keyboard interfaces.
In
Boot: Updated supported crystals in
(MHz),” on page
Corrected
Updated supported DataFlash device references in
EBI: Updated
“Organization of the External Bus Interface 1,” on page 169
Devices Connections,” on page 174
ALE NAND Flash signals. Removed reference to EBI0 for NANDOE and NANDWE.
In
In
I/O. Added Note
SHDW: In
for SHDW_SR register.
SMC: In
Byte Write Access mode.
ECC:
Section 23.3.1 “Write Access” on page 262
Section 23.4.4 “ECC Parity Register” on page 269
270
In
PMC: In
PIO: Notes
SPI: In
TWI: New
Section 10.4.3 “EBI1” on page
Table 20-5, “EBI Pins and External Devices Connections,” on page
Section 4.1 “324-ball TFBGA Package Outline” on page 10
Section 9.3 “Shutdown Controller” on page
Section 5.2 “Power Consumption” on page
Section 10.4.10 “Image Sensor Interface” on page 41
Table 12-3, ”AT91SAM9263 JTAG Boundary Scan Register”
Table 20-2, “EBI1 I/O Lines Description,” on page
Table 23-1, “ECC Register Mapping,” on page
updated.
Section 23.3 “Functional Description” on page 261
Section 31.6.4 “SPI Slave Mode” on page
Section 21.7.2.1 “Byte Write Access” on page
Section 27.3 “Processor Clock Controller” on page
Section 10.4.6 “NAND Flash” on page
Figure 13-3, “LDR Opcode,” on page
Section 32. “Two-wire Interface (TWI)” on page
Table 18-2, “Shutdown Controller (SHDWC) Registers,” on page
(1)
,
Figure 20-1, “Organization of the External Bus Interface 0,” on page 168
(2)
(5)
97.
and
on CE and NAND Flash.
and
(3)
Table 7-1, “List of Bus Matrix Masters,” on page
updated in
Table 7-3, “Masters to Slaves Access,” on page
40, added Ethernet 10/100 MAC to the System Resource Multiplexing
Table 30-2, “Register Mapping,” on page
with NANDALE and NANDCLE pins. Removed note on CLE and
Table 13-1, “Crystals Supported by Software Auto-detection
and
13, specified static current consumption as worst case.
28, corrected reference to shutdown pin.
98.
Section 23.3.2 “Read Access” on page 262
40, with information on EMAC.
266, corrected offset value for ECC_SR.
467, updated information on OVRES
and
Table 13-2, “DataFlash Device,” on page
171, corrected EBI address bus width.
199, added information that boot is not allowed in
Section 23.4.5 “ECC NParity Register” on page
and
updated.
483.
and
353, new details on PCK disable.
Section 10.4.11 “Timers” on page
corrected package top view.
AT91SAM9263 Preliminary
on
Table 20-5, “EBI Pins and External
page
174, corrected NAND Flash AD to
16,
86, changed pin 246 to NC.
17.
Table 7-2, “List of Bus Matrix
151, corrected offset value
436.
and
bit.
Figure 20-2,
updated.
99.
41,
Change
Request
Ref.
4463
4466
3870
3825
4064
4407
4230
4450
4186
4149
3850
3905
4224
3252
3970
4306
3835
3974
3943
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