at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 299

• Manufacturer Part Number: at91sam9263
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 24-16. DMA Transfer Flow for Source Address Auto-reloaded and Contiguous Destination Address
24.3.6
6249D–ATARM–20-Dec-07
Disabling a Channel Prior to Transfer Completion
Under normal operation, software enables a channel by writing a ‘1’ to the Channel Enable Reg-
ister, DMAC_ChEnReg.CH_EN, and hardware disables a channel on transfer completion by
clearing the DMAC_ChEnReg.CH_EN register bit.
The recommended way for software to disable a channel without losing data is to use the
CH_SUSP bit in conjunction with the FIFO_EMPTY bit in the Channel Configuration Register
(DMAC_CFGx) register.
1. If software wishes to disable a channel prior to the DMA transfer completion, then it can
2. Software can now poll the DMAC_CFGx.FIFO_EMPTY bit until it indicates that the
Block Complete interrupt
DMAC Transfer Complete
interrupt generated here
set the DMAC_CFGx.CH_SUSP bit to tell the DMAC to halt all transfers from the
source peripheral. Therefore, the channel FIFO receives no new data.
channel FIFO is empty.
generated here
Hardware reprograms
DMAC block transfer
Channel Enabled by
Source/destination
Row 1 of Table 4 ?
Channel Disabled by
SARx, CTLx, LLPx
Is DMAC in
status fetch
LLI Fetch
software
hardware
yes
AT91SAM9263 Preliminary
no
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