at91sam9263 ATMEL Corporation, at91sam9263 Datasheet - Page 217
at91sam9263
Manufacturer Part Number
at91sam9263
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9263.pdf
(1065 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
at91sam9263-CJ
Manufacturer:
ATMEL
Quantity:
181
Company:
Part Number:
at91sam9263-EK
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
at91sam9263B-CU
Manufacturer:
IDT
Quantity:
1 043
Part Number:
at91sam9263B-CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
at91sam9263B-CU-100
Manufacturer:
ATMEL
Quantity:
1 000
- Current page: 217 of 1065
- Download datasheet (16Mb)
21.10.2
Figure 21-22. TDF Optimization: No TDF Wait States Inserted if the TDF Period is Over When the Next Access Begins
21.10.3
6249D–ATARM–20-Dec-07
D[31:0]
A
NCS0
[25:2]
NWE
MCK
NRD
TDF Optimization Enabled (TDF_MODE = 1)
TDF Optimization Disabled (TDF_MODE = 0)
read access on NCS0 (NRD controlled)
When the TDF_MODE of the SMC_MODE register is set to 1 (TDF optimization is enabled), the
SMC takes advantage of the setup period of the next access to optimize the number of wait
states cycle to insert.
Figure 21-22
NWE, on Chip Select 0. Chip Select 0 has been programmed with:
NRD_HOLD = 4; READ_MODE = 1 (NRD controlled)
NWE_SETUP = 3; WRITE_MODE = 1 (NWE controlled)
TDF_CYCLES = 6; TDF_MODE = 1 (optimization enabled).
When optimization is disabled, tdf wait states are inserted at the end of the read transfer, so that
the data float period is ended when the second access begins. If the hold period of the read1
controlling signal overlaps the data float period, no additional tdf wait states will be inserted.
Figure
with no TDF optimization.
• read access followed by a read access on another chip select,
• read access followed by a write access on another chip select,
• read access followed by a write access on the same chip select,
21-23,
shows a read access controlled by NRD, followed by a write access controlled by
Figure 21-24
NRD_HOLD= 4
TDF_CYCLES = 6
and
Figure 21-25
Read to Write
Wait State
AT91SAM9263 Preliminary
illustrate the cases:
NWE_SETUP= 3
write access on NCS0 (NWE controlled)
217
Related parts for at91sam9263
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
AT91SAM ARM-based Flash MCU
Manufacturer:
ATMEL [ATMEL Corporation]
Datasheet:
Part Number:
Description:
At91sam Arm-based Flash Mcu
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
At91sam Arm-based Flash Mcu
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
At91sam Arm-based Embedded Mpu
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
At91sam Arm-based Embedded Mpu
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
At91sam Arm-based Embedded Mpu
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
At91sam Arm-based Embedded Mpu
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
At91sam Arm-based Embedded Mpu
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AT91 ARM Thumb-based Microcontrollers
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AT91 ARM THUMB-BASED MICROCONTROLLERS
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AT91 ARM Thumb-based Microcontrollers
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AT91 MEMORY EXTENSION CARD
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
AT91 ARM X40 SERIES EVAL KIT
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
AT91 ARM Cortex M3-based Processor
Manufacturer:
ATMEL [ATMEL Corporation]
Datasheet:
Part Number:
Description:
AT91 ARM Thumb-based Microcontrollers
Manufacturer:
ATMEL [ATMEL Corporation]
Datasheet: