DS3112+W Maxim Integrated Products, DS3112+W Datasheet - Page 70

IC MUX T3/E3 3.3V 256-PBGA

DS3112+W

Manufacturer Part Number
DS3112+W
Description
IC MUX T3/E3 3.3V 256-PBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3112+W

Controller Type
Framer, Multiplexer
Interface
Parallel/Serial
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS3112
7 T1/E1 LOOPBACK AND DROP AND INSERT FUNCTIONALITY
On the T1 and E1 ports, the DS3112 has loopback capability in both directions. There is a per-port line
loopback that loops the receive side back to the transmit side and a per-port diagnostic loopback that
loops the transmit side back to the receive side. In addition, the device can detect the T1 line loopback
command as well as generate it. Also, the DS3112 has two drop and insert ports that allow any two of the
28 T1 or 16/21 E1 data streams to be dropped or inserted from two auxiliary ports. All these functions are
described below.
7.1 T1/E1 Line Loopback
Each of the 28 T1 or 16/21 E1 receive demultiplexed ports can be looped back to the transmit side. This
loopback is called a line loopback and is shown in the block diagrams in Section 1. When the line
loopback is invoked, the normal transmit data input at the LTCLK and LTDAT inputs is ignored and
replaced with the data from the associated receive port. The host invokes the line loopback via the
T1E1LLB1 and T1E1LLB2 control registers (Section 7.5).
7.2 T1/E1 Diagnostic Loopback
Each of the 28 T1 or 16/21 E1 transmit multiplexed ports can be looped back to the receive side. This
loopback is called a diagnostic loopback and is shown in the block diagrams in Section 1. When the
diagnostic loopback is invoked, the normal receive data output at the LRCLK and LRDAT outputs is
replaced with the data from the associated transmit port. The host invokes the diagnostic loopback via the
T1E1DLB1 and T1E1DLB2 control registers (Section 7.5).
7.3 T1 Line Loopback Command
M13 systems have the ability to request that a T1 line be looped back, which is achieved by inverting the
C3 bit. See Section 14.2 for details on M13 formats and operation. The DS3112 will detect when the C3
bit has been inverted and will indicate which T1 line is being requested to be placed into line loopback
via the T1LBSR1 and T1LBSR2 registers (Section 7.6). When the host detects that a T1 line is being
requested to be placed into loopback, it should set the appropriate control bit in either the T1E1LLB1 or
T1E1LLB2 register. The DS3112 can also generate a T1 line loopback command by inverting the C3 bit,
which is accomplished via the T1LBCR1 and L1LBCR2 registers (Section 7.5). Note that when E3 or
G.747 mode is enabled, the T1 line loopback command functionality is not applicable.
7.4 T1/E1 Drop and Insert
The DS3112 has the ability to drop any of the 28 T1 or 16/21 E1 receive channels to either one of two
drop ports. Drop Port A and Drop Port B consist of the outputs LRCLKA/LRDATA and
LRCLKB/LRDATB, respectively. See the block diagrams in Section 1 for more details. The host can
determine which T1/E1 port should be dropped via the T1E1SDP control register (Section 7.7). When a
T1/E1 channel is dropped to either Drop Port A or B, the demultiplexed data is still output at the normal
LRCLK and LRDAT outputs. On the transmit side, there are a complimentary pair of Insert Ports that are
controlled via the T1E1SIP control register (Section 7.7). When enabled, the inserted port data and clock
(LTDATA/LTDATB and LTCLKA/LTCLKB, respectively) replace the data that would normally be
multiplexed in at LTDAT and LTCLK inputs.
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