DS3112+W Maxim Integrated Products, DS3112+W Datasheet - Page 54

• Manufacturer Part Number: DS3112+W
• Description: IC MUX T3/E3 3.3V 256-PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3112+W

• Controller Type: Framer, Multiplexer
• Interface: Parallel/Serial
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 150mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Mask for T3E3SR (IT3E3SR) register is set to a one and the T3E3SR bit in the Interrupt Mask for MSR (IMSR)
register is set to a one.
Bit 6: Receive T3/E3 Start Of Frame (RSOF). This latched read-only event status bit will be set to a one on each
T3/E3 receive frame boundary. This bit is a software version of the FRSOF hardware signal and it will be cleared
when read. The setting of this bit can cause a hardware interrupt to occur if the RSOF bit in the Interrupt Mask for
T3E3SR (IT3E3SR) register is set to a one and the T3E3SR bit in the Interrupt Mask for MSR (IMSR) register is
set to a one.
Figure 5-1. T3E3SR Status Bit Flow
NOTE: ALL EVENT AND ALARM LATCHES ABOVE ARE CLEARED WHEN THE T3E3SR REGISTER IS READ.
Receive LOS
Signal from
T3/E3 Framer
Receive LOF
Signal from
T3/E3 Framer
Receive AIS
Signal from
T3/E3 Framer
Receive RAI
Signal from
T3/E3 Framer
Receive Idle
Signal from
T3/E3 Framer
Receive Start
Of Frame
Signal from
T3/E3 Framer
Transmit Start
Of Frame
Signal from
T3/E3 Framer
Change in State Detect
Change in State Detect
Change in State Detect
Change in State Detect
Change in State Detect
Alarm Latch
Alarm Latch
Alarm Latch
Alarm Latch
Alarm Latch
Event Latch
Event Latch
T3IDLE (IT3E3SR Bit 4)
TSOF (IT3E3SR Bit 5)
LOS
(T3E3SR Bit 0)
LOF
(T3E3SR Bit 1)
AIS
(T3E3SR Bit 2)
RAI
(T3E3SR Bit 3)
T3IDLE
(T3E3SR Bit 4)
TSOF
(T3E3SR Bit 5)
RSOF
(T3E3SR Bit 6)
RSOF (IT3E3SR Bit 6)
LOS (IT3E3SR Bit 0)
LOF (IT3E3SR Bit 1)
AIS (IT3E3SR Bit 2)
RAI (IT3E3SR Bit 3)
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Event Latch
Event Latch
Event Latch
Event Latch
Event Latch
Mask
Mask
Mask
Mask
Mask
Mask
Mask
OR
T3E3SR
(IMSR Bit 9)
Mask
T3E3SR
Status Bit
(MSR Bit 9)
INT*
Hardware
Signal
DS3112