DS3112+W Maxim Integrated Products, DS3112+W Datasheet - Page 113

IC MUX T3/E3 3.3V 256-PBGA

DS3112+W

Manufacturer Part Number
DS3112+W
Description
IC MUX T3/E3 3.3V 256-PBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3112+W

Controller Type
Framer, Multiplexer
Interface
Parallel/Serial
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 13-3. AC Characteristics–Framer (T3 and E3) Ports
(V
(See
FRCLK/FTCLK Clock Period
FTCLK Clock Low Time
FTCLK Clock High Time
FTD/FTSOF Setup Time to the
Rising Edge or Falling Edge of
FTCLK
FTD/FTSOF Hold Time from the
Rising Edge or Falling Edge of
FTCLK
Delay from the Rising Edge or
Falling Edge of FRCLK/FTCLK to
Data Valid on FRDEN/FRD/
FRSOF/FTDEN/FTSOF
NOTES:
1) T3 mode.
2) E3 mode.
3) FRCLK is a buffered version of either FTCLK or HRCLK and, as such, the duty cycle of FRCLK is
4) FTSOF is configured to be an input.
5) FTSOF is configured to be an output.
6) In normal mode, FTD (and FTSOF if it is configured as an input) is sampled on the rising edge of FTCLK and
7) In inverted mode, FTD (and FTSOF if it is configured as an input) is sampled on the falling edge of FTCLK
Figure 13-3. Framer (T3 and E3) Port AC Timing Diagram
DD
determined by the source clock.
FRDEN, FRD, FRSOF, and FTDEN (and FTSOF if it is configured as an output) are updated on the rising
edge of FRCLK or FTCLK.
and FRDEN, FRD, FRSOF, and FTDEN (and FTSOF if it is configured as an output) are updated on the
falling edge of FRCLK or FTCLK.
= 3.3V ±5%, T
FRCLK / FTCLK
Normal Mode
FRCLK / FTCLK
Inverted Mode
FTD / FTSOF
FRD / FRDEN /
FRSOF / FTSOF /
FTDEN
Figure 13-
PARAMETER
3.)
A
= 0°C to +70°C for DS3112; T
t2
SYMBOL
t1
t4
t5
t6
t2
t3
113 of 133
t4
t1
MIN
9
9
3
3
3
t5
A
t6
= -40°C to +85°C for DS3112N.)
TYP
22.4
29.1
t3
MAX
10
ls_ac
UNITS
ns
ns
ns
ns
ns
ns
ns
NOTES
DS3112
1, 3
2, 3
4
4
5

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