DS3112+W Maxim Integrated Products, DS3112+W Datasheet - Page 126

IC MUX T3/E3 3.3V 256-PBGA

DS3112+W

Manufacturer Part Number
DS3112+W
Description
IC MUX T3/E3 3.3V 256-PBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3112+W

Controller Type
Framer, Multiplexer
Interface
Parallel/Serial
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.7
Unlike the M23 application that uses the C bits for stuffing, the C-Bit Parity mode assumes that a stuff bit
should be placed at every opportunity and, hence, the C bits can be used for other purposes.
lists how the C bits are redefined in the C-Bit Parity mode.
Table 14-4. C-Bit Assignment for C-Bit Parity Mode
SUBFRAME
NUMBER
M
1
2
3
4
5
6
7
C-Bit Parity Mode
NUMBER
C-BIT
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
Application ID
Reserved
Far End Alarm
and Control
(FEAC)
Unused
Unused
Unused
C-Bit Parity (CP)
C-Bit Parity (CP)
C-Bit Parity (CP)
FEBE
FEBE
FEBE
Data Link
Data Link
Data Link
Unused
Unused
Unused
Unused
Unused
Unused
FUNCTION
126 of 133
This bit (which is fixed to a value of 1) identifies the T3
data stream as operating in C-Bit Parity mode.
Must be set to one (1).
A serial communications channel that contains a repeating
16-bit codeword that indicates the state of the far-end and
can control the near-end by invoking loopbacks both on
the T3 and T1 lines. If no codewords are being sent, the
channel contains all ones.
All unused bits are set to a one (1).
All three CP bits are set to the same value as the two P
bits. If the three CP bits are not equal, a majority vote is
used to decode the true value.
All three Far End Block Error (FEBE) bits shall be set to
one (111) if the local T3 framer did not incur an error in
either the M bits or F bits nor has it detected a CP parity
error. The FEBE bits are set to any value except 111 when
an error is detected in the M bits or F bits or if a CP parity
error is detected. During an LOF event, these bits are set
to 000.
These three C bits make up a 28.2kbps HDLC (LAPD)
maintenance data link over which three 76 octet messages
are sent from the local end to the remote end once a
second.
Must be set to 1.
Must be set to 1.
Must be set to 1.
Must be set to 1.
Must be set to 1.
Must be set to 1.
DESCRIPTION
Table 14-4
DS3112

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