EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 754
![IC ARM9 SOC PROCESSOR 208LQFP](/photos/12/23/122385/mfg_ep9302_parts_sml.jpg)
EP9302-CQZ
Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9302-IQZ.pdf
(42 pages)
3.EP9302-IQZ.pdf
(4 pages)
4.EP9302-IQZ.pdf
(40 pages)
Specifications of EP9302-CQZ
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137
Available stocks
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Price
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Part Number:
EP9302-CQZ
Manufacturer:
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Quantity:
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Manufacturer:
ALTERA
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- EP9307-CRZ PDF datasheet
- EP9302-IQZ PDF datasheet #2
- EP9302-IQZ PDF datasheet #3
- EP9302-IQZ PDF datasheet #4
- Current page: 754 of 824
- Download datasheet (13Mb)
25
25-16
Analog Touch Screen Interface
EP93xx User’s Guide
25.2.6 Polled and Interrupt-Driven Modes
25.2.7 Touch Screen Package Dependency
The ADC provides support for synchronous sampling, in both polled mode and interrupt-
driven mode. In either mode, the touch screen scanning state machine should be disabled by
setting bit 15 of the TSSetup register to zero.
The ADC decimation filter conversion value appears in the TSXYResult register. With the
touch screen scanning state machine disabled, bit 31 of this register is the SDR, or
Synchronous Data Ready, bit. This bit is set when a new valid conversion value appears in
this register, and is cleared when this register is read. Hence, in polled mode, the
TSXYResult register may be read repeatedly. If two consecutive reads show the bit clear and
then set, the second read has a new valid value.
Conversion data may also be processed using interrupts from this module. If bit 11 in the
TSSetup2 register (the RINTEN bit) is set, an interrupt occurs whenever the SDR bit in the
TSXYResult register is set. Therefore, an interrupt handler can read the TSXYResult register
whenever a new valid sample appears in the register, which both returns a new conversion
value and clears the interrupt.
The Touch block uses the following external pins
ADC_GND
DAC_VDD
ADC_VDD
Signals
sXm
sYm
sXp
sYp
Xm
Ym
Xp
Yp
Touch Screen ADC power, nominal 3.3V. This supply is internally diode connected to the
Table 25-3. External Signal Functions
DAC_VDD supply to provide additional ESD protection.
Touch Screen ADC X axis voltage feedback inputs.
Touch Screen ADC Y axis voltage feedback inputs.
Should be connected to ADC_VDD on the board.
Should be connected to DAC_VDD on the board.
Copyright 2007 Cirrus Logic
Touch Screen ADC X axis analog bias output.
Touch Screen ADC Y axis analog bias output.
Touch Screen ADC ground
Function
DS785UM1
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