EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 127
![IC ARM9 SOC PROCESSOR 208LQFP](/photos/12/23/122385/mfg_ep9302_parts_sml.jpg)
EP9302-CQZ
Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9302-IQZ.pdf
(42 pages)
3.EP9302-IQZ.pdf
(4 pages)
4.EP9302-IQZ.pdf
(40 pages)
Specifications of EP9302-CQZ
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
EP9302-CQZ
Manufacturer:
Cirrus
Quantity:
3 295
Company:
Part Number:
EP9302-CQZ
Manufacturer:
ALTERA
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- EP9307-CRZ PDF datasheet
- EP9302-IQZ PDF datasheet #2
- EP9302-IQZ PDF datasheet #3
- EP9302-IQZ PDF datasheet #4
- Current page: 127 of 824
- Download datasheet (13Mb)
DS785UM1
5.1.1 System Startup
5.1.2 System Reset
5.1 Introduction
The System Controller (Syscon) provides:
These central resources are controlled by a set of software-locked registers, which can be
used to prevent accidental accesses. Syscon generates the various bus and peripheral
clocks and controls the system startup configuration.
System startup begins with the assertion of a reset signal. There are five different categories
of reset events. In order of decreasing effect, the reset events are:
During the time that any reset is active, the system is halted until it exits the reset state.
When the device starts with an external PRSTn or RSTOn, certain hardware configurations
are determined, and some system configuration information will be recorded so that software
can access it. See the details in
Control” on page
The device system reset consists of several events and signals. It has four levels of reset
control:
• Clock control
• Power management
• System configuration management
• PRSTn (external pin for power-on reset)
• RSTOn (external pin for user reset)
• Three-key reset externally generated by a Keypad (behaves like user reset)
• Watchdog reset (internally generated)
• Software reset (internally generated)
• Power-on-reset, controlled by PRSTn pin. It resets the entire processor with no
• User reset, controlled by RSTOn pin. While active, it resets the entire processor, except
exceptions.
5-2.
Copyright 2007 Cirrus Logic
“System Reset” on page 5-1
5System Controller
and
“Hardware Configuration
Chapter 5
5-1
5
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