EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 261

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

VSigStrtStop
DS785UM1
31
15
Address: 0x8003_0208
Default: 0x0000_0000
Definition: Vertical Signature Bounds Start/Stop register
30
14
RSVD
RSVD
29
13
28
12
CLKEN:
BLANK:
HSYNC:
VSYNC:
PEN:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Clock Enable - Read/Write
Writing a ‘1’ to this bit enables the CLKEN control for
calculation in the video signature.
Writing a ‘0’ to this bit disables the CLKEN control for
calculation in the video signature.
Blank - Read/Write
Writing a ‘1’ to this bit enables the BLANK output for
calculation in the video signature.
Writing a ‘0’ to this bit disables the BLANK output for
calculation in the video signature.
Horizontal Synchronization - Read/Write
Writing a ‘1’ to this bit enables the HSYNC output for
calculation in the video signature.
Writing a ‘0’ to this bit disables the HSYNC output for
calculation in the video signature.
Vertical Synchronization - Read/Write
Writing a ‘1’ to this bit enables the VSYNC output for
calculation in the video signature.
Writing a ‘0’ to this bit disables the VSYNC output for
calculation in the video signature.
Pixel Bits Enable - Read/Write
Writing ‘1’s to these bits enables respective pixel bits for
calculation in the video signature.
Writing ‘0’s to these bits disables respective pixel bits for
calculation in the video signature.
Raster Engine With Analog/LCD Integrated Timing and Interface
24
8
23
7
22
6
STOP
STRT
21
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
16
7-79
0
7