EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 299

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

BACKGROUND
DS785UM1
31
15
Address:
Default:
Mask:
Definition:
Bit Descriptions:
30
14
29
13
28
12
MASK:
0x8004_0030 - Read/Write
0x0000_0000
0x00FF_FFFF
RSVD:
BG:
Block Function Background Register
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Mask - Read/Write
For a Block Copy function, the value in this field specifies
the logical mask, if used. If BG = ‘1’, M = ‘00’, and REMAP
= ‘1’ in the
destination foreground color for source image pixels = ‘1’.
For Block Fill and Line Draw functions, the value in this
field specifies the pixel color for the destination image.
The mask or color value is located in the least significant
BPP part of the register for modes less than 24 bpp. Bits
0-23 are used for 24 bpp mode, bits 0-15 are used for
16 bpp mode, bits 0-7 are used for 8 bpp mode, and bits
0-3 are used for 4 bpp mode.
Reserved - Unknown during read
Background - Read/Write
When performing remap operations without transparency
(REMAP = ‘1’ and BG = ‘1’ in the
the value in this field specifies the destination background
pixel color for source pixels that have a value of ‘0’.
Bits that are ‘1’ in this field can be used with Line Draw
functions to specify a ‘blank space’ in the drawn line.
The pixel color value is located in the least significant BPP
part of the field for modes less than 24 bpp.
24
8
BG
BLOCKCTRL
23
7
22
6
21
5
register, the value specifies the
20
4
BG
BLOCKCTRL
19
3
Graphics Accelerator
EP93xx User’s Guide
18
2
register),
17
1
16
8-35
0
8