EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 209

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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DS785UM1
7.4.9.1.4
7.4.9.1.5
7.4.9.1.6
7.4.9.1.7
Six bits select the height of the cursor image. The height is measured in lines and should be
set to a value of one less then the desired number of lines.
Two bits select the cursor width:
0 0
0
1 0
1 1
Six bits are used in DUAL SCAN mode, where DUAL SCAN mode is selected by writing
DSCAN = ‘1’ to the
This register is set to the cursor color value that is used when the pixel color value is a 0x2
(10 binary).
This register is set to the cursor color value that is used when the pixel color value is a 0x3
(11 binary).
This register provides the place in the X and Y position of the image where the cursor should
be inserted. The X position is represented by the XLOC bits and the Y position is represented
by the YLOC bits in the
with the respective counter (YLOC is the line counter, XLOC is the pixel counter). These
values must fall between the active start and stop parameters for the display.
This register also contains the enable bit, CEN, for the hardware cursor. Writing a ‘1’ to this bit
enables the hardware cursor.
See
Note: Very rarely, a vertical line appears when the hardware cursor becomes enable or
“CursorDScanLHYLoc”
CursorColor1 Register
CursorColor2 Register
CursorXYLoc Register
CursorDScanLHYLoc Register
disabled. This line is a few pixels wide and only lasts for one frame. It is hard to catch. In
order to prevent this problem: 1. Do not enable/disable the cursor when changing the
cursor bitmaps, and 2. When disabling the cursor, change the CursorXYLOc register to
point to a blank cursor image.
Width is 1 word or 16 pixels
1Width is 2 words or 32 pixels
Width is 3 words or 48 pixels
Width is 4 words or 64 pixels
CLINS
CWID
DLNS
“PixelMode”
“CursorXYLoc”
register.
Copyright 2007 Cirrus Logic
register.
Raster Engine With Analog/LCD Integrated Timing and Interface
register. The XLOC bits and YLOC bits are compared
EP93xx User’s Guide
7-27
7

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