EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 599

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

DS785UM1
17.3.2.1.1 Select Ir Mode
17.3.2.1.2 Select Data Rate
17.3.2.2.1 Initialization
17.3.2.1 General Configuration
17.3.2.2 Transmitting Data
The IrEnable register selects which of the three Ir sub-modules is used to operate the IrDA
interface. Only one of the three may be active at any one time. The reset value for this
register is zero, which disables all three encoder/decoder modules. The bottom two bits of
this register select the encoder/decoder module according to the tabulated values:
SIR does not use the data transfer mechanism described in this section. After selecting SIR
mode, all data transfer operations are made through a UART, as if connection is through a
serial cable without handshake lines. The features described below are implemented for the
MIR and FIR modes.
The data rates for MIR and FIR are as follows:
The principal method of data transfer from memory to the active IrDA encoder (MIR or FIR) is
by DMA. Typically DMA can be used to transfer data of any length into the transmit FIFO
when requested by the infrared peripheral. When polling or interrupts are used to perform the
data transfer, a mechanism exists for transmitting data packets that are not a multiple of 4
bytes in length. This uses a register called IrDataTail and its use is described in the next
section.
The DMA route is usually provided to overcome any large interrupt response times that may
exist in the SoC where the Infrared module is going to be used. These large interrupt
response times can make programmed I/O an impractical method for transferring large Ir
data packets.
• MIR - Clear BRD bit in IrControl (IrCon) for 0.576 Mbit/sec,
• FIR - Fixed at 4 Mbit/sec.
Set BRD bit in IrCon for 1.152 Mbit/sec.
IrEnable
EN1
0
0
1
1
Table 17-1. Bit Values to Select Ir Module
Copyright 2007 Cirrus Logic
IrEnable
EN0
0
1
0
1
Encoder
Selected
None
MIR
SIR
FIR
EP93xx User’s Guide
IrDA
17-3
17