EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 249

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

CursorAdrReset
DS785UM1
31
15
Address: 0x8003_0064
Default: 0x0000_0000
Definition: Cursor Image Address Reset register
Bit Descriptions:
30
14
29
13
28
12
ADR:
NA:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Address - Read/Write
The Cursor Address Reset value that is written to this field
specifies the SDRAM location of the part of the cursor that
will be displayed next after reaching the last line of the
cursor.
Both start and reset locations are necessary for Dual Scan
display of cursor information. If the cursor is totally in the
upper half or lower half of the screen, the Start and Reset
locations will be the same. Otherwise the cursor will start
being overlaid on the video information at the start
address, and when the dual scan height counter
generates a carry, will jump to the reset value. The cursor
will then continue to be overlaid when the Y location is
reached, and will jump to the start address value when the
height counter for the upper half generates a carry.
Offsetting the reset value and changing the width of the
cursor to be different from the cursor step value allows the
right 48, 32, or 16 pixels of a larger cursor to be displayed
only. Furthermore, offsetting the reset X location off of the
left edge of the screen will allow pixel placement of the
cursor off of the screen edge.
Not Assigned - Will return the written value
ADR
Raster Engine With Analog/LCD Integrated Timing and Interface
24
8
ADR
23
7
22
6
21
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
NA
16
7-67
0
7