EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 464
![IC ARM9 SOC PROCESSOR 208LQFP](/photos/12/23/122385/mfg_ep9302_parts_sml.jpg)
EP9302-CQZ
Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9302-IQZ.pdf
(42 pages)
3.EP9302-IQZ.pdf
(4 pages)
4.EP9302-IQZ.pdf
(40 pages)
Specifications of EP9302-CQZ
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9302-CQZ
Manufacturer:
Cirrus
Quantity:
3 295
Company:
Part Number:
EP9302-CQZ
Manufacturer:
ALTERA
Quantity:
672
Part Number:
EP9302-CQZ
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
- EP9307-CRZ PDF datasheet
- EP9302-IQZ PDF datasheet #2
- EP9302-IQZ PDF datasheet #3
- EP9302-IQZ PDF datasheet #4
- Current page: 464 of 824
- Download datasheet (13Mb)
11
HcDoneHead
HcFmInterval
11-24
Universal Serial Bus Host Controller
EP93xx User’s Guide
FIT
31
15
31
15
Address:
Default:
Definition:
Bit Description:
Address:
Default:
Definition:
Bit Descriptions:
RSVD
30
14
30
14
29
13
29
13
28
12
28
12
0x8002_0030
0x0000_0000
Physical address of the last completed transfer descriptor that was added to
the done list.
RSVD:
AD:
0x8002_0034
0x0000_2EDF
Describes the bit time interval in a frame and the full speed maximum packet
size.
27
27
11
11
26
10
26
10
AD
Copyright 2007 Cirrus Logic
25
25
9
9
Reserved. Unknown During Read.
DoneHead. When a TD is completed, HC writes the
content of HcDoneHead to the NextTD field of the TD. HC
then overwrites the content of HcDoneHead with the
address of this TD. This is set to zero whenever HC writes
the content of this register to HCCA. It also sets the
WritebackDoneHead of HcInterruptStatus.
24
24
8
8
AD
FSMPS
23
23
7
7
FI
22
22
6
6
21
21
5
5
20
20
4
4
19
19
3
3
18
18
2
2
RSVD
17
17
1
1
DS785UM1
16
16
0
0
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