r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 808

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface with FIFO (SCIF)
The receive margin in asynchronous mode can therefore be expressed as shown in equation 1.
Equation 1:
From equation 1, if F = 0 and D = 0.5, the receive margin is 46.875%, as given by equation 2.
Equation 2:
This is a theoretical value. A reasonable margin to allow in system designs is 20% to 30%.
Rev. 2.00 Dec. 09, 2005 Page 784 of 1152
REJ09B0191-0200
Where: M: Receive margin (%)
M = (0.5 −
When D = 0.5 and F = 0:
M = (0.5 − 1/(2 × 16)) × 100%
= 46.875%
N: Ratio of clock frequency to bit rate (N = 16)
D: Clock duty (D = 0 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute deviation of clock frequency
2N
1
) − (L − 0.5) F −
D − 0.5
N
(1 + F) × 100 %