r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 267

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Bit
4, 3
2
Bit Name
TRWL[1:0]*

Initial
Value
00
0
R/W
R
R/W
Description
Number of Auto-Precharge Startup Wait Cycles
Specify the number of minimum auto-precharge
startup wait cycles as shown below.
•
•
The setting for areas 2 and 3 is common.
00: No cycle
01: 1 cycle
10: 2 cycles
11: 3 cycles
Reserved
This bit is always read as 0. The write value should
always be 0.
Cycle number from the issuance of the WRITA
command by this LSI until the completion of auto-
precharge in the SDRAM.
Equivalent to the cycle number from the issuance
of the WRITA command until the issuance of the
ACTV command. Confirm that how many cycles
are required between the WRITE command receive
in the SDRAM and the auto-precharge activation,
referring to each SDRAM data sheet. And set the
cycle number so as not to exceed the cycle number
specified by this bit.
Cycle number from the issuance of the WRITA
command until the issuance of the PRE command.
This is the case when accessing another low
address in the same bank in bank active mode.
Rev. 2.00 Dec. 09, 2005 Page 243 of 1152
Section 8 Bus State Controller (BSC)
REJ09B0191-0200