r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 8

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

• Notation in bit figures and tables describing arrangements of bits
Rev. 2.00 Dec. 09, 2005 Page viii of xxiv
Each register description includes a figure that illustrates the arrangement of bits and a table
that describes the meanings of settings in the bits.
Initial value:
R/W:
(1) Bit
(2) Bit Name
(3) Initial Value
(4) R/W
(5) Description
Bit:
Indicates whether each bit is readable or writable, or either writing to or reading from the bit is
prohibited.
The notation is as follows:
R/W:
R/(W):
R:
W:
Note: The bit names and sentences in the above figure are examples, and have nothing to do with the contents of this
Indicates the bit number.
In the case of a 32-bit register, the bits are arranged in order from 31 to 0, and in the case
of a 16-bit register, the bits are arranged in the order from 15 to 0.
The short form of the name of the bit or bit field within the register.
When the individual bits of bit fields have to be clearly indicated, notation allowing this is
included (e.g., ASID[3:0]).
A reserved bit is indicated by −.
Instead of a bit name, a blank is used for some bits, such as those of timer counters.
Indicates the value of each bit after a power-on reset, i.e., the initial value.
0: Initial value is 0
1: Initial value is 1
−: Initial value is undefined
Describes the function enabled by setting the bit.
(1)
15
Bit
15
14 to 11
10
9
R
0
-
manual.
R/W
14
Bit or field is readable and writable.
Bit or field is readable and writable.
However, writing is only performed to clear the flag.
Bit or field is readable and writable.
However, "R" is indicated for all reserved bits. When writing to the bit is required, write
the value stated in the bit table or the initial value.
Bit or field is readable and writable.
However, only the value in the bit table is guaranteed when reading from the bit.
0
Bit Name
−
ASID
−
−
−
(2)
R/W
13
0
ASID
R/W
12
0
(3)
Initial Value R/W
0
0000
0
1
0
R/W
11
0
10
R
0
(4)
-
R
R/W
R
R
R
9
1
-
Description
Reserved
This bit is always read as 0. The write value should always be 0.
Address Identifier
Enables or disables the pin function.
Reserved
This bit is always read as 0.
Reserved
This bit is always read as 1.
R/W
8
0
-
R/W
7
0
-
R/W
6
0
-
R/W
5
0
-
(5)
R/W
4
Q
0
R/W
3
0
ACMP[2:0]
R/W
2
0
R/W
1
0
R/W
IFE
0
0