r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 754

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface with FIFO (SCIF)
Rev. 2.00 Dec. 09, 2005 Page 730 of 1152
REJ09B0191-0200
Bit
3
2
1, 0
Bit Name
STOP

CKS[1:0]
Initial
Value
0
0
00
R/W
R/W
R
R/W
Stop Bit Length
Description
Selects one or two bits as the stop bit length in
asynchronous mode. This setting is used only in
asynchronous mode. It is ignored in clocked
synchronous mode because no stop bits are added.
When receiving, only the first stop bit is checked,
regardless of the STOP bit setting. If the second stop
bit is 1, it is treated as a stop bit, but if the second stop
bit is 0, it is treated as the start bit of the next incoming
character.
0: One stop bit
1: Two stop bits
Reserved
This bit is always read as 0. The write value should
always be 0.
Clock Select
Select the internal clock source of the on-chip baud rate
generator. For further information on the clock source,
bit rate register settings, and baud rate, see section
15.3.8, Bit Rate Register (SCBRR).
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
Note: Pφ: Peripheral clock
When transmitting, a single 1-bit is added at the end
of each transmitted character.
When transmitting, two 1 bits are added at the end of
each transmitted character.