r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 108

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 3 Clock Pulse Generator (CPG)
3.5.2
Counting by the WDT does not proceed if the frequency divisor is changed but the multiplier is
not.
1. In the initial state, IFC[2:0] = B'000 and PFC[2:0] = B'011.
2. Set the desired value in the IFC[2:0] and PFC[2:0] bits. The values that can be set are limited
3. After the register bits (IFC[2:0] and PFC[2:0]) have been set, the clock is supplied of the new
Note: When executing the SLEEP instruction after the frequency has been changed, be sure to
Rev. 2.00 Dec. 09, 2005 Page 84 of 1152
REJ09B0191-0200
by the clock operating mode and the multiplication rate of PLL circuit 1. Note that if the wrong
value is set, this LSI will malfunction.
division ratio.
read the frequency control register (FRQCR) three times before executing the SLEEP
instruction.
Changing the Division Ratio

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