r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 535
r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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(4)
Figure 10.23 illustrates the operation when TCNT_1 and TCNT_2 have been cascaded and the
I2AE and I1AE bits in TICCR have been set to 1 to include the TIOC2A and TIOC1A pins in the
TGRA_1 and TGRA_2 input capture conditions, respectively. In this example, the IOA0 to IOA3
bits in both TIOR_1 and TIOR_2 have selected both the rising and falling edges for the input
capture timing. Under these conditions, the ORed result of TIOC1A and TIOC2A input is used for
the TGRA_1 and TGRA_2 input capture conditions.
(5)
Figure 10.24 illustrates the operation when TCNT_1 and TCNT_2 have been cascaded and the
I2AE bit in TICCR has been set to 1 to include the TIOC2A pin in the TGRA_1 input capture
conditions. In this example, the IOA0 to IOA3 bits in TIOR_1 have selected TGRA_0 compare
match or input capture occurrence for the input capture timing while the IOA0 to IOA3 bits in
TIOR_2 have selected the TIOC2A rising edge for the input capture timing.
Under these conditions, as TIOR_1 has selected TGRA_0 compare match or input capture
occurrence for the input capture timing, the TIOC2A edge is not used for TGRA_1 input capture
condition although the I2AE bit in TICCR has been set to 1.
Cascaded Operation Example (c)
Cascaded Operation Example (d)
TGRA_1
TGRA_2
TCNT_1
TIOC1A
TIOC2A
H'FFFF
H'C256
H'9192
H'6128
H'2064
H'0000
TCNT_2 value
Figure 10.23 Cascaded Operation Example (c)
H'0512
H'0512
H'6128
H'0513
H'2064
H'0513
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 Dec. 09, 2005 Page 511 of 1152
H'C256
H'0514
H'0514
H'9192
REJ09B0191-0200
Time
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