r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 372

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 8 Bus State Controller (BSC)
Table 8.19 Minimum Number of Idle Cycles on Internal Bus (CPU Operation)
CPU Operation
Write → write
Write → read
Read → write
Read → read
Table 8.20 Minimum Number of Idle Cycles on Internal Bus (DMAC Operation)
DMAC Operation
Write → write
Write → read
Read → write
Read → read
Notes: 1. The write → write and read → read columns in dual address transfer indicate the cycles
Rev. 2.00 Dec. 09, 2005 Page 348 of 1152
REJ09B0191-0200
2. For the write → read cycles in dual address transfer, 0 means different channels are
3. The write → read and read → write columns in single address transfer indicate the case
in the divided access cycles.
activated successively and 2 means when the same channel is activated successively.
when different channels are activated successively. The "write" means transfer from a
device with DACK to external memory and the "read" means transfer from external
memory to a device with DACK.
8:1
1
0
1
0
Dual Address
0
0 or 2
0
0
6:1
1
0
1
0
4:1
2
0
2
0
Clock Ratio (Iφ:Bφ)
Transfer Mode
3:1
2
0
2
0
Single Address
2
0
0
2
2:1
2
0
2
0
1:1
3
1
3
1