r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 355
r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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Section 8 Bus State Controller (BSC)
8.5.9
PCMCIA Interface
With this LSI, areas 5 and 6 can be used for the IC memory card and I/O card interface defined in
the JEIDA specifications version 4.2 (PCMCIA2.1 Rev. 2.1) by specifying bits TYPE[2:0] in
CSnBCR (n = 5 and 6) to B'101. In addition, the bits SA[1:0] in CSnWCR (n = 5 and 6) assign the
upper or lower 32 Mbytes of each area to IC memory card or I/O card interface. For example, if
the bits SA1 and SA0 in CS5WCR are set to 1 and cleared to 0, respectively, the upper 32 Mbytes
of area 5 are used for IC memory card interface and the lower 32 Mbytes are used for I/O card
interface.
When the PCMCIA interface is used, the bus size must be specified as 8 bits or 16 bits using the
bits BSZ[1:0] in CS5BCR or CS6BCR.
Figure 8.42 shows an example of connection between this LSI and a PCMCIA card. To enable hot
swapping (insertion and removal of the PCMCIA card with the system power turned on), tri-state
buffers must be connected between the LSI and the PCMCIA card.
In the JEIDA and PCMCIA standards, operation in big endian mode is not clearly defined.
Consequently, the provided PCMCIA interface in big endian mode is available only for this LSI.
Rev. 2.00 Dec. 09, 2005 Page 331 of 1152
REJ09B0191-0200
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