r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 240

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
Section 8 Bus State Controller (BSC)
8.4.3
CSnWCR specifies various wait cycles for memory access. The bit configuration of this register
varies as shown below according to the memory type (TYPE2 to TYPE0) specified by the CSn
space bus control register (CSnBCR). Specify CSnWCR before accessing the target area. Specify
CSnBCR first, then specify CSnWCR.
CSnWCR is initialized to H'00000500 by a power-on reset and retains the value by a manual reset
and in software standby mode.
(1)
• CS0WCR
Initial value:
Initial value:
Rev. 2.00 Dec. 09, 2005 Page 216 of 1152
REJ09B0191-0200
Bit
31 to 22
21
R/W:
R/W:
Normal Space, SRAM with Byte Selection, MPX-I/O
Bit:
Bit:
CSn Space Wait Control Register (CSnWCR) (n = 0 to 8)
Bit Name
 *
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
0
R/W
28
12
R
0
0
-
SW[1:0]
R/W
27
11
R
0
0
R/W
R
R/W
-
R/W
26
10
R
0
1
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
Set this bit to 0 when the interface for normal space or
SRAM with byte selection is used.
R/W
25
R
0
9
0
-
WR[3:0]
R/W
24
R
0
8
1
-
R/W
23
R
0
7
0
-
R/W
WM
22
R
0
6
0
-
R/W
21
R
0
5
0
-
-
R/W
BAS
20
R
0
4
0
-
19
R
R
0
3
0
-
-
18
R
R
0
2
0
-
-
R/W
R/W
17
0
1
0
-
HW[1:0]
R/W
R/W
16
0
0
0
-

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