AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 91

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

NAND Tree Testing
The controller provides a NAND tree test mode to allow
checking connectivity to the device on a printed circuit
board. The NAND tree is built on all PCI bus pins.
NAND tree testing is enabled by asserting RST. PG input
should be driven HIGH during NAND tree testing. All PCI
bus signals will become inputs on the assertion of RST.
The result of the NAND tree test can be observed on the
INTA pin. See Figure 49.
Pin 141 (RST) is the first input to the NAND tree. Pin 142
(CLK) is the second input to the NAND tree, followed by
pin 143 (GNT). All other PCI bus signals follow, counter-
clockwise, with pin 61 (AD0) being the last. Table 24 and
Table 25 shows the complete list of pins connected to the
NAND tree.
RST (pin141)
CLK (pin 142)
GNT (pin 143)
AD0 (pin 61)
VDD
Figure 49. NAND Tree Circuitry (160 PQFP)
....
Am79C978A
Am79C978
Core
RST must be asserted low to start a NAND tree test se-
quence. Initially, all NAND tree inputs except RST should
be driven high. This will result in a high output at the INTA
pin. If the NAND tree inputs are driven from high to low in
the same order as they are connected to build the NAND
tree, INTA will toggle every time an additional input is
driven low. INTA will change to low, when CLK is driven
low and all other NAND tree inputs stay high. INTA will
toggle back to high, when GNT is additionally driven low.
The square wave will continue until all NAND tree inputs
are driven low. INTA will be high, when all NAND tree in-
puts are driven low. See Figure 50.
Some of the pins connected to the NAND tree are outputs
in normal mode of operation. They must not be driven
from an external source until the controller is configured
for NAND tree testing.
INTA
A
B
MUX
S
O
INTA (pin 140)
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