AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 194
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AM79C978A
Manufacturer Part Number
AM79C978A
Description
Single-Chip 1/10 Mbps PCI Home Networking Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C978A.pdf
(256 pages)
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HPR27: HomePNA PHY Event Status (Register 27)
The Event Status register reports the state of each
event source. Any bit may be written and so facilitate
software-stimulated event testing.
HPR28: HomePNA PHY ISBI Control (Register 28)
HPR29: HomePNA PHY TX Control (Register 29)
194
Hex
Hex
Hex
1C
1D
1B
Address
Address
Address
Bits
15:8
Bits
15:8
Bits
15:8
7:0
7:0
7:4
3:0
AID_CTRL
AID_INTERVAL
AID_ISBI
ISBI_CTRL
ISBI_SLOW
ISBI_FAST
TX_CTRL
TX_PULSE_WIDTH
TX_PULSE_CYCLES_N
TX_PULSE_CYCLES_P
Table 73. HPR27: HomePNA PHY Event Status (Register 27)
Table 74. HPR8: HomePNA PHY ISBI Control (Register 28)
Table 75. HPR29: HomePNA PHY TX Control (Register 29)
Mnemonic
Mnemonic
Mnemonic
This value defines the number of TCLKs
(116.6 ns) separating AID symbols.
This value defines the number of TCLKs
(116.6 ns) separating AID symbol 0.
This value defines the number of TCLKs
(116.6 ns) separating data pulses for
Symbol 0 in low speed mode.
This value defines the number of TCLKs
(116.6 ns) separating data pulses for
Symbol 0 in high speed mode.
This value defines the duration of a transmit
pulse in OSC cycles (16.7 ns). This will
effectively determine the transmit spectrum
of the PHY.
This value defines the number of pulses
that will be driven onto the HRTXRX_N pin.
This value defines the number of pulses
that will be driven onto the HRTXRX_P pin.
Am79C978A
Description
Description
Description
Read/
Read/
Read/
Write
Write
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
Default
Default
Hex
Hex
Hex
2C
1C
14
40
04
4
4
Reset
Reset
Reset
Soft
Soft
Soft
2C
1C
14
40
04
4
4
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