AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 183
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AM79C978A
Manufacturer Part Number
AM79C978A
Description
Single-Chip 1/10 Mbps PCI Home Networking Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C978A.pdf
(256 pages)
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TBR6: 10BASE-T Auto-Negotiation Expansion
Register (Register 6)
The Auto-Negotiation Expansion Register provides ad-
ditional information which aids the Auto-Negotiation
TBR7: 10BASE-T Auto-Negotiation Next Page
Register (Register 7)
The Auto-Negotiation Next Page Register contains the
next page link code word to be transmitted. On power-up
Reserved Registers (Registers 8-15, 18, 20-23, and
25-31)
The
Bit(s)
Bit(s)
15:5
10:0
15
14
13
12
11
4
3
2
1
0
Am79C978A home networking
Link Partner ANEG
Parallel Detection
Link Partner Next
Next Page Able
Acknowledge 2
Page Received
Message Page
Message Field
Page Able
Next Page
Reserved
Reserved
Toggle
Name
Name
Table 55. TBR6: 10BASE-T Auto-Negotiation Expansion Register (Register 6)
Fault
Able
Table 56. TBR7: 10BASE-T Auto-Negotiation Next Page Register (Register 7)
1 = Parallel detection fault
0 = No parallel detection fault
1 = Link partner is next page able
0 = Link partner is not next page able
1 = Am79C978A home networking device channel is next
page able
0 = Am79C978A home networking device channel is not next
page able
1 = A new page has been received
0 = A new page has not been received
1 = Link partner is Auto-Negotiation able
0 = Link partner is not Auto-Negotiation able
Am79C978A home networking device channel next page request
Am79C978A home networking device channel message page
request
1 = Am79C978A home networking device channel can comply
with the request
0 = Am79C978A home networking device channel cannot
comply with the request
Am79C978A home networking device channel toggle bit
Message code field
device contains
Am79C978A
Description
Description
process. The Auto-Negotiation Expansion Register bits
are Read Only. See Table 55.
the default value of 2001h represents a message page
with the message code set to null. See Table 56.
reserved registers at addresses 8-15, 18, 20-23, and
25-31. These registers should be ignored when read
and should not be written at any time.
RO, LH
RO, LH
Read/
Read/
Write
Write
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
H/W or Soft
H/W or Soft
Reset
Reset
0x001
0
0
0
1
0
0
0
0
1
0
0
183
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