AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 201

• Manufacturer Part Number: AM79C978A
• Description: Single-Chip 1/10 Mbps PCI Home Networking Controller
• Manufacturer: AMD [Advanced Micro Devices]

TMD0
Bit
31-0
TMD1
Bit
31
30
29
TBADR
OWN
ERR
ADD_FCS
Name
Name
Transmit Buffer address. This
field contains the address of the
transmit buffer that is associated
with this descriptor.
This bit indicates whether the de-
scriptor entry is owned by the
host (OWN = 0) or by the
Am79C978A controller (OWN =
1). The host sets the OWN bit af-
ter filling the buffer pointed to by
the
Am79C978A controller clears the
OWN bit after transmitting the
contents of the buffer. Both the
Am79C978A controller and the
host must not alter a descriptor
entry after it has relinquished
ownership.
ERR is the OR of UFLO, LCOL,
LCAR, RTRY or BPE. ERR is set
by the Am79C978A controller
and cleared by the host. This bit
is set in the current descriptor
when the error occurs and, there-
fore, may be set in any descriptor
of a chained buffer transmission.
ADD_FCS dynamically controls
the generation of FCS on a frame
by frame basis. This bit should be
set with the ENP bit. However, for
backward compatibility, it is rec-
ommended that this bit be set for
every descriptor of the intended
frame. When ADD_FCS is set,
the state of DXMTFCS is ignored
and transmitter FCS generation is
activated. When ADD_FCS is
cleared to 0, FCS generation is
controlled by DXMTFCS. When
APAD_XMT (CSR4, bit 11) is set
to 1, the setting of ADD_FCS has
no effect. ADD_FCS is set by the
host, and is not changed by the
Am79C978A controller. This is a
reserved bit in the C-LANCE
(Am79C90) controller.
Description
Description
descriptor
entry.
Am79C978A
The
28
27
26
MORE/LTINT Bit 28 always functions as
MORE
LTINT
ONE
DEF
MORE indicates that more than
LTINT is used to suppress inter-
MORE. The value of MORE is
written by the Am79C978A
controller and is read by the
host.
cleared to 0 (CSR5, bit 14), the
Am79C978A
never look at the contents of
bit 28, write operations by the
host have no effect. When
LTINTEN is set to 1 bit 28
changes its function to LTINT
on host write operations and
on Am79C978A controller read
operations.
one retry was needed to transmit
a frame. The value of MORE is
written by the Am79C978A con-
troller. This bit has meaning only
if the ENP bit is set.
rupts after successful transmis-
sion on selected frames. When
LTINT is cleared to 0 and ENP is
set to 1, the Am79C978A control-
ler will not set TINT (CSR0, bit 9)
after a successful transmission.
TINT will only be set when the
last descriptor of a frame has
both LTINT and ENP set to 1.
When LTINT is cleared to 0, it will
only cause the suppression of in-
terrupts for successful transmis-
sion. TINT will always be set if the
transmission has an error. The
LTINTEN overrides the function
of TOKINTD (CSR5, bit 15).
ONE indicates that exactly one re-
try was needed to transmit a
frame. ONE flag is not valid when
LCOL is set. The value of the ONE
bit is written by the Am79C978A
controller. This bit has meaning
only if the ENP bit is set.
Deferred
Am79C978A controller had to de-
fer while trying to transmit a
frame. This condition occurs if the
channel
Am79C978A controller is ready to
transmit. DEF is set by the
Am79C978A
cleared by the host.
When
is
indicates
busy
controller
controller
LTINTEN
when
that
201
and
will
the
the
is