AM79C978A AMD [Advanced Micro Devices], AM79C978A Datasheet - Page 142
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AM79C978A
Manufacturer Part Number
AM79C978A
Description
Single-Chip 1/10 Mbps PCI Home Networking Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C978A.pdf
(256 pages)
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IFS1
or S_RESET and is not affected
by STOP.
InterFrameSpacingPart1. Chang-
ing IFS1 allows the user to pro-
gram the value of the InterFrame-
SpacePart1
Am79C978A controller sets the
default value at 60 bit times (3ch).
See the subsection on Medium
Allocation in the section Media
Access Management for more
details. The equation for setting
IFS1 when IPG
IFS1 = IPG - 36 bit times
Note: Programming of the IPG
should be done in nibble intervals
instead of absolute bit times due
timing.
96 bit times is:
Am79C978A
The
to the MII. The decimal and hex
values do not match due to de-
lays in the part used to make up
the final IPG.
Changes should be added or sub-
tracted from the provided hex val-
ue on a one-for-one basis. Due to
changes in synchronization de-
lays internally through different
network ports, the IFS1 can be off
by as much as +12 bit times.
These bits are read accessible al-
ways. Write accessible only when
the SPND bit or the STOP bit is
set to 1. IFS1 is set to 3ch (60 bit
times)
S_RESET and is not affected by
STOP.
by
H_RESET
or
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